The present invention relates to a semiconductor device and, more particularly, to a method of forming micro patterns in a semiconductor device.
As the level of device integration increases, the size of a minimum line width shrinks. However, the development of exposure equipment for implementing a micro line width required for such a high level of integration of devices may not satisfy the needs.
In order to implement a micro line width needed for such a higher level of integration, several process steps are required. For example, in order to form a hard mask pattern for forming a micro pattern, a double exposure etch tech (DEET) method, a spacer formation method, etc. must be performed. In the event that the DEET method is employed, a critical dimension (CD) becomes poor because of overlay between neighboring patterns. If the spacer formation method is employed, only micro patterns having a simple and uniform CD can be formed.